2) Sub (W) - Hitachi H8/300H Series Programming Manual

2.2.59 (2) SUB (W)

SUB (SUBtract binary)
Operation
Rd – (EAs) → Rd
Assembly-Language Format
SUB.W <EAs>, Rd
Operand Size
Word
Description
This instruction subtracts a source operand from the contents of a 16-bit register Rd (destination
operand) and stores the result in the 16-bit register Rd.
Available Registers
Rd: R0 to R7, E0 to E7
Rs: R0 to R7, E0 to E7
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode
Immediate SUB.W
Register direct SUB.W
Notes
Operands
1st byte
#xx:16, Rd 7 9
Rs, Rd 1 9
Condition Code
I UI H U
— — —
H: Set to 1 if there is a borrow at bit 11;
otherwise cleared to 0.
N: Set to 1 if the result is negative; otherwise
cleared to 0.
Z: Set to 1 if the result is zero; otherwise
cleared to 0.
V: Set to 1 if an overflow occurs; otherwise
cleared to 0.
C: Set to 1 if there is a borrow at bit 15;
otherwise cleared to 0.
Instruction Format
2nd byte 3rd byte
3 rd
rs rd
178
Subtract Binary
N Z V C
No. of
States
4th byte
IMM 4
2