Trapa - Hitachi H8/300H Series Programming Manual

2.2.62 TRAPA

TRAPA (TRAP Always)
Operation
PC → @–SP
CCR → @–SP
<Vector> → PC
Assembly-Language Format
TRAPA #x:2
Operand Size
—
Description
This instruction pushes the program counter (PC) and condition-code register (CCR) on the stack,
then sets the I bit to 1 and branches to a new address. The new address is the contents of the vector
address corresponding to the specified vector number. The PC value pushed on the stack is the
starting address of the next instruction after the TRAPA instruction.
#x
0
1
2
3
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode
Register direct TRAPA
Notes
1. CCR bit 6 is set to 1 when used as an interrupt mask bit, but retains its previous value when
used as a user bit.
2. The stack and vector structure differ between normal mode and advanced mode.
Normal Mode
H'0010 to H'0011
H'0012 to H'0013
H'0014 to H'0015
H'0016 to H'0017
Operands
1st byte
#x:2 5 7
182
Condition Code
I UI H U
1 ∆
*1
— — — — — —
I: Always set to 1.
U: See notes.
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
Vector Address
H'000020 to H'000023
H'000024 to H'000027
H'000028 to H'00002B
H'00002C to H'00002F
Instruction Format
2nd byte 3rd byte
00 IMM 0
Trap Unconditionally
N Z V C
Advanced Mode
No. of
States
4th byte
14