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2.2.9 BIAND

BIAND (Bit Invert AND)
Operation
C ∧ [¬ (<bit No.> of <EAd>)] → C
Assembly-Language Format
BIAND #xx:3, <EAd>
Operand Size
Byte
Description
This instruction ANDs the inverse of a specified bit in the destination operand with the carry bit
and stores the result in the carry bit. The bit number is specified by 3-bit immediate data. The
destination operand contents remain unchanged.
Specified by #xx:3
Bit No.
7
<EAd>
C
Available Registers
Rd:
R0L to R7L, R0H to R7H
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode*
Register direct
BIAND
Register indirect
BIAND
Absolute address
BIAND
Note:
The addressing mode is the addressing mode of the destination operand <EAd>.
*
Notes
For the @aa:8 access range, refer to the relevant microcontroller hardware manual.
0
Invert
C
Operands
1st byte
#xx:3.Rd
7
#xx:3.@ERd
7
C
#xx:3.@aa:8
7
E
56
Condition Code
I
UI H
— — — — — — —
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Stores the result of the operation.
Instruction Format
2nd byte
3rd byte
6
1 IMM
rd
0 erd
0
7
abs
7
Bit Logical AND
U
N
Z
V
C
No. of
States
4th byte
6
1 IMM
0
6
1 IMM
0
2
6
6

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