3) Inc (L) - Hitachi H8/300H Series Programming Manual

2.2.31 (3) INC (L)

INC (INCrement)
Operation
ERd + 1 → ERd
ERd + 2 → ERd
Assembly-Language Format
INC.L #1, ERd
INC.L #2, ERd
Operand Size
Longword
Description
This instruction adds the immediate value 1 or 2 to the contents of a 32-bit register ERd
(destination register) and stores the result in the 32-bit register ERd.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode
Register direct INC.L
Register direct INC.L
Notes
An overflow is caused by the operations H'7FFFFFFF + 1 → H'80000000, H'7FFFFFFF + 2 →
H'80000001, and H'7FFFFFFE + 2 → H'80000000.
Operands
1st byte
#1, ERd 0 B
#2, ERd 0 B
104
Condition Code
I UI H U
— — — —
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
cleared to 0.
Z: Set to 1 if the result is zero; otherwise
cleared to 0.
V: Set to 1 if an overflow occurs; otherwise
cleared to 0.
C: Previous value remains unchanged.
Instruction Format
2nd byte 3rd byte
7 0 erd
F 0 erd
Increment
N Z V C
—
No. of
States
4th byte
2
2