Hitachi H8/300H Series Programming Manual page 61

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Bcc (Branch conditionally)
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode
Program-counter
BRA (BT)
relative
Program-counter
BRN (BF)
relative
Program-counter
BHI
relative
Program-counter
BLS
relative
Program-counter
Bcc (BHS)
relative
Program-counter
BCS (BLO)
relative
Program-counter
BNE
relative
Program-counter
BEQ
relative
Program-counter
BVC
relative
Program-counter
BVS
relative
Program-counter
BPL
relative
Program-counter
BMI
relative
Program-counter
BGE
relative
Program-counter
BLT
relative
Program-counter
BGT
relative
Program-counter
BLE
relative
Notes
1.
The branch destination address must be even.
2.
In machine language BRA, BRN, BCC, and BCS are identical to BT, BF, BHS, and BLO,
respectively. The number of execution states for BRn (BF) is the same as for two NOP
instructions.
Operands
1st byte
d:8
4
0
d:16
5
8
d:8
4
1
d:16
5
8
d:8
4
2
d:16
5
8
d:8
4
3
d:16
5
8
d:8
4
4
d:16
5
8
d:8
4
5
d:16
5
8
d:8
4
6
d:16
5
8
d:8
4
7
d:16
5
8
d:8
4
8
d:16
5
8
d:8
4
9
d:16
5
8
d:8
4
A
d:16
5
8
d:8
4
B
d:16
5
8
d:8
4
C
d:16
5
8
d:8
4
D
d:16
5
8
d:8
4
E
d:16
5
8
d:8
4
F
d:16
5
8
53
Instruction Format
2nd byte
3rd byte
disp
0
0
disp
disp
1
0
disp
disp
2
0
disp
disp
3
0
disp
disp
4
0
disp
disp
5
0
disp
disp
6
0
disp
disp
7
0
disp
disp
8
0
disp
disp
9
0
disp
disp
A
0
disp
disp
B
0
disp
disp
C
0
disp
disp
D
0
disp
disp
E
0
disp
disp
F
0
disp
Conditional Branch
No. of
States
4th byte
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6
4
6

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