Jsr - Hitachi H8/300H Series Programming Manual

2.2.33 JSR

JSR (Jump to SubRoutine)
Operation
PC → @–SP
Effective address → PC
Assembly-Language Format
JSR <EA>
Operand Size
—
Description
This instruction pushes the program counter on the stack as a return address, then branches to a
specified effective address. The program counter value pushed on the stack is the address of the
instruction following the JSR instruction.
Available Registers
ERn: ER0 to ER7
Operand Format and Number of States Required for Execution
Addressing
Mnemonic
Mode
Register indirect JSR
Absolute JSR
address
Memory indirect JSR
Operands
1st byte 2nd byte
@ERn 5 D 0 ern
@aa:24 5 E
@@aa:8 5 F
Condition Code
I UI H
— — — — — — — —
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
Instruction Format
3rd byte 4th byte
0
abs
abs
106
Jump to Subroutine
U N Z V C
No. of State
Normal Advanced
6 8
8 10
8 12