Conf_Done And Init_Done - Intel Agilex Configuration User Manual

6. Intel Agilex Debugging Guide
UG-20205 | 2019.04.03

6.7.3. CONF_DONE and INIT_DONE

For Intel Agilex devices, both
implement the
CONF_DONE
OR an Intel Agilex
and
CONF_DONE
to
INIT_DONE SDM_IO16
these pins in the Intel Quartus Prime Software or in the Intel Quartus Prime settings file, (
are low prior to and during configuration.
INIT_DONE
data.
INIT_DONE
Note: The entire device does not enter user mode simultaneously.Intel recommends that you include the
IP on page 19 to hold your application logic in the reset state until the entire FPGA fabric is in user mode.
and
CONF_DONE
Edition Device and Pin Options menu defines.
Debugging Suggestions
Place the
CONF_DONE
Pin Mapping and Setting Additional Configuration Pins for more information.
Send Feedback
and
CONF_DONE INIT_DONE
and pins as open drains with a weak internal pull-up. Consequently, you cannot wire
INIT_DONE
or signal with the
CONF_DONE INIT_DONE
behave as these signals behaved in earlier device families. If you assign
INIT_DONE
and , weak internal pull-downs pull these pins low at power-on reset. Ensure you specify
SDM_IO0
asserts when the device enters user mode.
are optional signals. You can use these pins for other functions that the Intel Quartus Prime Pro
INIT_DONE
and pins on the
INIT_DONE
share multiplexed
SDM_IO
signal from previous device families. Otherwise,
nSTATUS
asserts when the device finishes receiving configuration
CONF_DONE
pins that correlate with the board-level connection. Refer to SDM
SDM_IO
pins. Previous device families
and
CONF_DONE
). and
.qsf CONF_DONE
Intel Agilex Reset Release
Intel ® Agilex ™ Configuration User Guide
107