Configuration Firmware Pointer Block (Cpb) - Intel Agilex Configuration User Manual

5.4.1. Configuration Firmware Pointer Block (CPB)

The configuration firmware accesses the configuration firmware pointer block when performing remote system update. The
Intel Quartus Prime Programming Files Generator sets up the initial configuration firmware pointer block. Each copy of the
configuration firmware pointer block (CPB0/CPB1) must be exactly 4 KB.
The configuration firmware does not load an image if a pointer contains a value of all zeros or all ones.
Note: Application images must align to partition boundaries in the flash device. If an application image is less than a full partition,
the rest of the partition cannot be used.
Table 27. Configuration Firmware Pointer Block Format
Offset
0
0x20
0x28
And so on
0xFF0
0xFF8
Intel ® Agilex ™ Configuration User Guide
98
Size (Bytes)
32
8 First (lowest priority) image pointer slot
8 Second (2nd lowest priority) image pointer slot
8
8 Last (highest priority) image pointer
—
Sub-Partition Name
Reserved
—
Reserved
5. Remote System Update
UG-20205 | 2019.04.03
Example Content
• Bit [31:0]: Applications Image N Start address
• Bit [63:32]: Reserved
• Bit [31:0]: Applications Image 2 Start address
• Bit [63:32]: Reserved
—
• Bit [31:0]: Applications Image 1 Start address
• Bit [63:32]: Reserved
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