Intel Agilex Configuration User Manual page 46

Hide thumbs Also See for Agilex:
Table of Contents

Advertisement

Figure 16.
Flash Memories in 16-Bit Mode
The flash memory addresses in 16-bit flash memory shift one bit down in comparison with the flash addresses in PFL II IP core. The flash address in the flash
memory starts from bit 1 instead of bit 0.
Figure 17.
Cypress and Micron M28, M29 Flash Memory in 8-Bit Mode
The flash memory addresses in Cypress 8-bit flash shifts one bit up. Address bit 0 of the PFL II IP core connects to data pin
Intel
®
Agilex
Configuration User Guide
46
address: 23 bits
address: 23 bits
Flash Memory
PFL II
22
23
21
22
20
21
-
-
-
-
-
-
2
3
1
2
0
1
address: 24 bits
address: 24 bits
PFL II
Flash Memory
23
22
22
21
21
20
-
-
-
-
-
-
2
1
1
0
0
D15
3. Intel Agilex Configuration Schemes
UG-20205 | 2019.04.03
of the flash memory.
D15
Send Feedback

Advertisement

Table of Contents
loading

Table of Contents