Intel Agilex Configuration User Manual page 77

Hide thumbs Also See for Agilex:

Table of Contents

3. Intel Agilex Configuration Schemes

UG-20205 | 2019.04.03

•

If you specify the

you specify in the Intel Quartus Prime software.

•

For designs including the High Bandwidth Memory (HBM2) IP or any IP using transceivers, you must provide a free

running and stable reference clock to the device before device configuration begins. All transceiver power supplies must

be at the required voltage before configuration begins.

•

When you use the JTAG interface for reconfiguration after an initial reconfiguration using AS or the Avalon-ST interface,

the

must be in the file format you specified in the Intel Quartus Prime project. For example, if initially configure the

.sof

pins for AS configuration and configure using the AS scheme, a subsequent JTAG reconfiguration using a

MSEL

generated for Avalon-ST fails.

Send Feedback

as the clock source for configuration, ensure that

OSC_CLK_1

is running at the frequency

OSC_CLK_1

Intel

Agilex

™

Configuration User Guide

.sof

Table of Contents