Programmable I/O Element (Ioe) Features In Intel Agilex Devices - Intel Agilex User Manual

General purpose i/o and lvds serdes
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2. Intel Agilex I/O Features and Usage
UG-20214 | 2019.04.02
1.5 V
VCCIO_PIO
When using 1.5 V
standards. The buffer can interface with upstream or downstream devices that are
compatible with the electrical specification of Intel Agilex devices, specified in the Intel
Agilex Device Data Sheet. Analyze the electrical specification requirement to
implement your true differential receiver. Implement DC coupling when the signal
swing and offset voltage requirement is bounded within the Intel Agilex 1.5 V True
Differential Signaling standard specification. Otherwise, implement AC coupling and
external bias circuitry.
Related Information
Intel Agilex Data Sheet
2.2. Programmable I/O Element (IOE) Features in Intel Agilex
Devices
The SDM and HPS I/O buffers in the Intel Agilex devices support different I/O
standards and programmable I/O features than the general purpose I/O buffers. The
following tables list the supported I/O standards and features by each I/O bank.
Table 3.
Programmable IOE Feature Settings for Intel Agilex GPIO Bank
I/O
Standard
Slew Rate
Control
1.2 V
Fast
LVCMOS
(Default)
Medium
Slow
SSTL-12
Fast
(Default)
Medium
Slow
HSTL-12
Fast
(Default)
Medium
Slow
Send Feedback
voltage, you can only implement true differential I/O
VCCIO_PIO
Programmable IOE Feature
I/O
Open-Drain
Bus-Hold
Delay
Output
Refer
Off
Off
to
(Default)
(Default)
data
On
On
sheet
Refer
to
data
sheet
Refer
to
device
data
sheet
Weak Pull-
Pre-
up Resistor
Emphasis
Off
(Default)
On
®
Intel
Agilex
General Purpose I/O and LVDS SERDES User Guide
De-Emphasis
Differential
Output
Voltage
Off
(Default)
Low
Medium
High
Low
constant
impedance
Medium
constant
impedance
High
constant
impedance
Off
(Default)
Low
Medium
High
continued...
11

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