Intel Agilex User Manual page 3

Contents
5.2.1. LVDS SERDES Transmitter Blocks............................................................... 39
5.2.2. Serializer Bypass for DDR and SDR Operations.............................................39
5.2.3. Serializer................................................................................................ 40
5.2.4. Differential I/O Bit Position........................................................................ 41
5.2.5. Clocking Differential Transmitters............................................................... 42
5.3. Intel Agilex LVDS SERDES Receiver........................................................................ 42
5.3.1. LVDS SERDES Receiver Blocks................................................................... 42
5.3.2. Clocking LVDS SERDES Receivers...............................................................47
5.3.3. LVDS SERDES Receiver Modes .................................................................. 47
5.4. Intel Agilex LVDS SERDES Source-Synchronous Timing Budget.................................. 50
5.4.1. Transmitter Channel-to-Channel Skew........................................................ 50
5.4.2. Receiver Skew Margin ..............................................................................51
5.5. Intel Agilex LVDS SERDES Timing.......................................................................... 52
5.5.1. I/O Timing Analysis.................................................................................. 53
5.6. Intel Agilex LVDS SERDES Design Guidelines........................................................... 53
5.6.1. Use High-Speed Clock from PLL to Clock SERDES Only..................................53
5.6.2. Pin Placement for Differential Channels....................................................... 54
5.6.3. SERDES Pin Pairs for Soft-CDR Mode.......................................................... 54
6. Documentation Related to the Intel Agilex General Purpose I/O and LVDS SERDES
User Guide............................................................................................................... 55
7. Document Revision History for the Intel Agilex General Purpose I/O and LVDS
SERDES User Guide.................................................................................................. 56
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Intel Agilex General Purpose I/O and LVDS SERDES User Guide
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