Intel Agilex User Manual page 9

General purpose i/o and lvds serdes
Hide thumbs Also See for Agilex:
Table of Contents

Advertisement

2. Intel Agilex I/O Features and Usage
UG-20214 | 2019.04.02
Table 1.
Intel Agilex I/O Standards Support per I/O Bank Type
The 1.5 V True Differential Signaling I/O standard is compatible with the LVDS, RSDS, Mini-LVDS, and LVPECL
standards at lower signal swing. Refer to Intel Agilex Device Data Sheet for the electrical specifications of the
1.5 V True Differential Signaling I/O standard.
I/O Standard
1.8 V LVCMOS
1.2 V LVCMOS
SSTL-12
HSTL-12
POD12
Differential SSTL-12
Differential HSTL-12
Differential HSUL-12
Differential POD12
1.5 V True Differential
Signaling
Table 2.
Intel Agilex GPIO Bank Supported I/O Standards
I/O Standard
VCCIO_PIO
(V)
1.2 V LVCMOS
1.2
SSTL-12
1.2
HSTL-12
1.2
HSUL-12
1.2
POD12
1.2
Differential
1.2
(1)
SSTL-12
Differential
1.2
(1)
HSTL-12
Differential
1.2
(1)
HSUL-12
Differential
1.2
(1)
POD-12
1.5 V True
1.5
Differential
Signaling
Related Information
Special Pins Requirement
(1)
Uses two single-ended outputs with second output programmed as inverted.
Send Feedback
GPIO Bank
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
VCCPT (V)
Vref (V)
1.8
-
1.8
0.6
1.8
0.6
1.8
0.6
1.8
Internally
calibrated
1.8
-
1.8
-
1.8
-
1.8
Internally
calibrated
1.8
-
on page 29
Intel
HPS I/O Bank
Yes
No
No
No
No
No
No
No
No
No
VTT (V)
Application
-
General
purpose
0.6
DDR4,
RLDRAM3,
QDR-IV
0.6
QDR-IV
-
LPDDR3
1.2
DDR4, QDR-IV
0.6
RLDRAM3
0.6
General
purpose
-
LPDDR3
1.2
DDR4
-
SGMII, SFI,
SPI
®
Agilex
General Purpose I/O and LVDS SERDES User Guide
SDM I/O Bank
Yes
No
No
No
No
No
No
No
No
No
JEDEC
Standard
JESD-12A.01
JESD79-4B
JESD-16A
JESD209-3C
JESD79-4B
JESD79-4B
JESD8-16A
JESD209-3C
JESD79-4B
-
9

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents