Intel Agilex User Manual page 23

3. Intel Agilex I/O Termination
UG-20214 | 2019.04.02
Figure 12. R OCT with Calibration
S
This figure shows the R
Table 7. Selectable I/O Standards for R
I/O Standard
1.2 V LVCMOS
SSTL-12
POD12
HSTL-12
HSUL-12
Differential SSTL-12
Differential POD12
Differential HSTL-12
Differential HSUL-12
R OCT
T
R OCT with calibration is available only for configuration of input and bidirectional
T
pins. Output pin configurations do not support R
The R OCT calibration circuit compares the total impedance of the I/O buffer to the
T
external resistor connected to the
continuously altered until the target impedance is achieved during OCT calibration.
The targeted impedance is achieved when the impedance of I/O buffer reaches a
predetermined ratio to the reference resistance.
Calibration occurs at the end of the device configuration. When the calibration circuit
finds the correct impedance, the circuit powers down and stops changing the
characteristics of the drivers. You may trigger re-calibration during user-mode.
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as the intrinsic impedance of the output transistors.
S
Driver
Series Termination
V
CCIO
R
S
R
S
GND
OCT
S
R
RZQ
Intel
Receiving
Z = 50 Ω
0
OCT without Calibration
S
(Ω)
34, 40 (Default)
34, 40 (Default)
34 (Default), 40
34, 40 (Default)
34, 40 (Default)
34, 40 (Default)
34 (Default), 40
34, 40 (Default)
34, 40 (Default)
OCT with calibration.
T
pin. The impedance of the I/O buffer is
® ™
Agilex General Purpose I/O and LVDS SERDES User Guide
Device
R OCT with Calibration
S
(Ω)
34, 40
34, 40
34, 40
34, 40
34, 40
34, 40
34, 40
34, 40
34, 40
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