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(5)
Stop condition
When the SCLn pin is at high level, changing the SDAn pin from low level to high level generates a stop
condition (n = 0, 1).
A stop condition is a signal that the master device outputs to the slave device when serial transfer has been
completed. The slave device includes hardware that detects stop conditions.
Remark
n = 0, 1
A stop condition is generated when bit 0 (SPTn) of IIC control register n (IICCn) is set to 1. When the stop
condition is detected, bit 0 (SPDn) of IIC status register n (IICSn) is set to 1 and INTIICn is generated when bit 4
(SPIEn) of IICCn is set to 1 (n = 0, 1).
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CHAPTER 10
SERIAL INTERFACE FUNCTION
Figure 10-13. Stop Condition
H
SCL
SDA
User's Manual U13850EJ6V0UD
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