Table of Contents
Advertisement
(4) Prescaler mode registers 00, 01 (PRM00, PRM01)
PRM0n selects the count clock of the 16-bit timer (TM0) and the valid edge of TI0n input. PRM00 and PRM01
are set by an 8-bit memory manipulation instruction.
RESET input clears PRM00 and PRM01 to 00H.
After reset: 00H R/W
7
PRM00
ES011
After reset: 00H R/W
7
PRM01
0
ES011
0
0
1
1
ES001
0
0
1
1
PRM02
0
0
0
0
1
1
1
1
Notes 1. The external clock requires a pulse longer than twice that of the internal clock (f
2. Only in the V850/SB1.
Cautions 1. When selecting the valid edge of TI00 as the count clock, do not specify the clear & start
mode entered on the valid edge of TI00 or TI00 as a capture trigger.
2. Before setting data to PRM0n, always stop the timer operation.
3. If the 16-bit timer (TM0) operation is enabled by specifying the rising edge or both edges
as the valid edge of the TI0n pin while the TI0n pin is high level immediately after system
reset, the rising edge is detected immediately after the rising edge or both edges is
specified. Be careful when pulling up the TI0n pin. However, the rising edge is not
detected when operation is enabled after it has been stopped.
CHAPTER 7
TIMER/COUNTER FUNCTION
Address: FFFFF206H
6
5
4
ES010
ES001
ES000
Address: FFFFF20EH
6
5
4
0
0
0
ES010
Selection of valid edge of TI01
0
Falling edge
1
Rising edge
0
Setting prohibited
1
Both rising and falling edges
ES000
Selection of valid edge of TI00
0
Falling edge
1
Rising edge
0
Setting prohibited
1
Both rising and falling edges
PRM01
PRM00
Count clock
0
0
f
/2
XX
0
1
f
/16
XX
1
0
INTWTNI
1
1
TI00 valid edge
0
0
f
/4
XX
0
1
f
/64
XX
1
0
f
/256
XX
1
1
Setting prohibited
User's Manual U13850EJ6V0UD
3
2
1
0
0
PRM01
3
2
1
0
0
0
Count clock selection
f
XX
Note 2
20 MHz
12.58 MHz
100 ns
158 ns
1.3 µ s
800 ns
−
−
Note 1
200 ns
318 ns
3.2 µ s
5.1 µ s
12.8 µ s
20.3 µ s
−
0
PRM00
0
PRM02
−
−
−
/2).
XX
209
Advertisement
Table of Contents
