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IEBus sequence
Control bits (4 bits)
INTIE2
STATUSF flag
Internal NACK flag
Because in (4) and (5) the communication was from other than the unit that sent the lock request while
the IEBus was in the locked state, the start or communication complete interrupt (INTIE2) is not
generated, even if the IEBus unit is the communication target. The STATUSF flag (bit 4 of the ISR
register) is set and the status interrupt (INTIE2) generated, however, if a slave status or lock address
request is acknowledged. Note that even if the same control data is received while the IEBus is in the
locked state, the interrupt generation timing for INTIE2 differs depending on whether the master unit (3)
or another unit (4) is requesting the locked state.
Figure 19-13. Timing of INTIE2 Interrupt Generation in Locked State (for (4) and (5))
Start
IEBus sequence
INTIE2
Note The telegraph length and data modes are not set in the case of (5) because ACK is not returned.
Remark P: Parity bit, A: ACK/NACK bit
568
CHAPTER 19
IEBus CONTROLLER (V850/SB2)
Figure 19-12. Interrupt Generation Timing (for (2) and (5))
Control field
Parity bit (1 bit)
Flag set by reception
of 0H, 4H, 5H, 6H
Broad-
Master address
casting
(12 + P)
User's Manual U13850EJ6V0UD
ACK bit (1 bit)
Flag reset by
CPU processing
Slave address
Control
(12 + P + A)
(4 + P + A)
Status
interrupt
Terminated by communication error
Error generated by
detection of NACK
Telegraph
Note
Data
Note
length
(8 + P + A)
(8 + P + A)
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