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The communication reservation timing is shown below.
Program processing
Hardware processing
SCL
1
2
3
SDA
IICn:
IIC shift register n
STTn:
Bit 1 of IIC control register n (IICCn)
STDn:
Bit 1 of IIC status register n (IICSn)
SPDn: Bit 0 of IIC status register n (IICSn)
Remark
n = 0, 1
Communication reservations are acknowledged at the following timing. After bit 1 (STDn) of IIC status register n
(IICSn) is set to 1, a communication reservation can be made by setting bit 1 (STTn) of IIC control register n (IICCn)
to 1 before a stop condition is detected (n = 0, 1).
Figure 10-17. Timing for Acknowledging Communication Reservations
SCL
SDA
STD
SPD
Remark
n = 0, 1
322
CHAPTER 10
SERIAL INTERFACE FUNCTION
Figure 10-16. Communication Reservation Timing
STT
=1
Communication
reservation
4
5
6
7
8
Standby mode
User's Manual U13850EJ6V0UD
Write to
IIC0
Set SPD
Set
and INTIIC0
STD
9
1
Output by master with bus mastership
2
3
4
5
6
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