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(2) Measurement of two pulse widths with free-running counter
The pulse widths of the two signals respectively input to the TIn0 and TIn1 pins can be measured when 16-bit
timer register n (TMn) is used as a free-running counter (refer to Figure 7-11).
When the edge specified by the ESn00 and ESn01 bits of prescaler mode register n0 (PRMn0) is input to the
TIn0 pin, the value of the TMn is loaded to 16-bit capture/compare register n1 (CRn1) and an external interrupt
request signal (INTTMn1) is set.
When the edge specified by the ESn10 and ESn11 bits in PRMn0 is input to the TIn1 pin, the value of TMn is
loaded to 16-bit capture/compare register n0 (CRn0), and an external interrupt request signal (INTTMn0) is set.
The edges of the TIn0 and TIn1 pins are specified by the ESn00 and ESn01 bits and the ESn10 and ESn11 bits
of PRMn0, respectively. The rising, falling, or both rising and falling edges can be specified.
The valid edge is detected by sampling at the count clock cycle selected by prescaler mode register n0, n1
(PRMn0, PRMn1), and a capture operation is not performed until the valid level is detected two times. Therefore,
noise with a short pulse width can be eliminated.
Figure 7-11. Control Register Settings for Measurement of Two Pulse Widths with Free-Running Counter
TMCn
0
0
CRCn
0
0
Remark
0/1: When these bits are reset to 0 or set to 1, other functions can be used along with the pulse
width measurement function.
registers 0, 1 (TMC0, TMC1) and 7.1.4 (2) Capture/compare control registers 0, 1 (CRC0,
CRC1).
CHAPTER 7
TIMER/COUNTER FUNCTION
(a) 16-bit timer mode control registers 0, 1 (TMC0, TMC1)
TMCn3
0
0
(b) Capture/compare control registers 0, 1 (CRC0, CRC1)
0
0
User's Manual U13850EJ6V0UD
TMCn2
TMCn1
0
1
0/1
CRCn2
CRCn1
0
1
0
For details, refer to 7.1.4 (1) 16-bit timer mode control
OVFn
0
Free-running mode
CRCn0
1
CRn0 used as capture
register
Captures valid edge of
TIn1 pin to CRn0.
CRn1 used as capture
register
217
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