NEC V850/SB1 User Manual page 23

32-bit single-chip microcontroller
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Figure No.
10-28
Address ........................................................................................................................................................ 354
10-29
Transfer Direction Specification ................................................................................................................... 355
10-30
ACK Signal ................................................................................................................................................... 356
10-31
Stop Condition .............................................................................................................................................. 357
10-32
Wait Signal ................................................................................................................................................... 358
10-33
Arbitration Timing Example .......................................................................................................................... 381
10-34
Communication Reservation Timing............................................................................................................. 384
10-35
Timing for Accepting Communication Reservations..................................................................................... 384
10-36
Communication Reservation Flowchart........................................................................................................ 385
10-37
Timing at Which STTn = 1 Cannot Be Set.................................................................................................... 386
10-38
Master Communication Start or Stop Flowchart ........................................................................................... 387
10-39
Master Operation Flowchart (1).................................................................................................................... 389
10-40
Master Operation Flowchart (2).................................................................................................................... 390
10-41
Slave Operation Flowchart ........................................................................................................................... 391
10-42
Example of Master to Slave Communication
(When 9-Clock Wait Is Selected for Both Master and Slave) ....................................................................... 393
10-43
Example of Slave to Master Communication
(When 9-Clock Wait Is Selected for Both Master and Slave) ....................................................................... 396
10-44
Block Diagram of UARTn ............................................................................................................................. 400
10-45
ASIMn Setting (Operation Stop Mode) ......................................................................................................... 406
10-46
ASIMn Setting (Asynchronous Serial Interface Mode) ................................................................................. 407
10-47
ASISn Setting (Asynchronous Serial Interface Mode).................................................................................. 408
10-48
BRGCn Setting (Asynchronous Serial Interface Mode)................................................................................ 409
10-49
BRGMCn0 and BRGMCn1 Settings (Asynchronous Serial Interface Mode)................................................ 410
10-50
Error Tolerance (When k = 16), Including Sampling Errors.......................................................................... 412
10-51
Format of Transmit/Receive Data in Asynchronous Serial Interface............................................................ 413
10-52
Timing of Asynchronous Serial Interface Transmit Completion Interrupt ..................................................... 415
10-53
Timing of Asynchronous Serial Interface Receive Completion Interrupt ...................................................... 416
10-54
Receive Error Timing.................................................................................................................................... 417
10-55
Block Diagram of CSI4 ................................................................................................................................. 420
10-56
When Transfer Bit Length Other Than 16 Bits Is Set ................................................................................... 421
10-57
CSIM4 Setting (Operation Stop Mode) ......................................................................................................... 426
10-58
CSIM4 Setting (3-Wire Variable-Length Serial I/O Mode) ............................................................................ 427
10-59
CSIB4 Setting (3-Wire Variable-Length Serial I/O Mode)............................................................................. 428
10-60
Timing of 3-Wire Variable-Length Serial I/O Mode....................................................................................... 429
10-61
Timing of 3-Wire Variable-Length Serial I/O Mode (When CSIB4 = 08H) .................................................... 430
11-1
Block Diagram of A/D Converter .................................................................................................................. 432
11-2
Basic Operation of A/D Converter ................................................................................................................ 439
11-3
Relationship Between Analog Input Voltage and A/D Conversion Result .................................................... 440
11-4
A/D Conversion by Hardware Start (with Falling Edge Specified)................................................................ 441
11-5
A/D Conversion by Software Start................................................................................................................ 442
11-6
Handling of Analog Input Pin ........................................................................................................................ 444
LIST OF FIGURES (4/6)
Title
User's Manual U13850EJ6V0UD
Page
23

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