Table of Contents
Advertisement
Capture/compare control
register n (CRCn)
Noise
TIn1
eliminator
Note
Count clock
Selector
Noise
f
/2
XX
eliminator
TIn0
PRMn2
Prescaler mode
register n1 (PRMn1)
Note The count clock is set by the PRMn0 and PRMn1 registers.
Remark n = 0, 1
(1) Interval timer
Generates an interrupt at predetermined time intervals.
(2) PPG output
Can output a square wave whose frequency and output-pulse width can be changed arbitrarily.
(3) Pulse width measurement
Can measure the pulse width of a signal input from an external source.
(4) External event counter
Can measure the number of pulses of a signal input from an external source.
(5) Square wave output
Can output a square wave of any frequency.
(6) One-shot pulse output
Can output a one-shot pulse with any output pulse width.
CHAPTER 7
TIMER/COUNTER FUNCTION
Figure 7-1. Block Diagram of TM0 and TM1
Internal bus
CRCn2
CRCn1
CRCn0
16-bit capture/compare
Selector
register n0 (CRn0)
16-bit timer register (TMn)
3
Noise
16-bit capture/compare
eliminator
register n1 (CRn1)
CRCn2
PRMn1 PRMn0
16-bit timer mode
Prescaler mode
control register n
register n0 (PRMn0)
(TMCn)
User's Manual U13850EJ6V0UD
Selector
Match
Clear
Match
TMCn3
TMCn2
TMCn1
OVFn
OSPTn
Internal bus
INTTMn0
Output
TOn
controller
Selector
LVRn
TOCn1
OSPEn
TOCn4
LVSn
Timer output control
register n (TOCn)
INTTMn1
TOEn
201
Advertisement
Table of Contents
