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Figure 19-7. Bit Configuration of Slave Status
MSB
Bit 7
Bit 6
Note 1
Bit 0
0
Transmit data is not written in IEBus data register (DR)
1
Transmit data is written in IEBus data register (DR)
Note 2
Bit 1
0
Receive data is not stored in IEBus data register (DR)
1
Receive data is stored in IEBus data register (DR)
Bit 2
0
Unit is not locked
1
Unit is locked
Bit 3
0
Fixed to 0
Note 3
Bit 4
0
Slave transmission is stopped
1
Slave transmission is ready
Bit 5
0
Fixed to 0
Bit 7
Bit 6
0
0
0
1
1
0
1
1
Notes 1. After reset: Bit 0 is set to 1.
2. The receive buffer size is 1 byte.
3. When the V850/SB2 serves as a slave unit, this bit corresponds to the status indicated by bit 4
(ENSLVTX) of the IEBus control register (BCR).
4. When the V850/SB2 serves as a slave unit, bits 7 and 6 are fixed to '0' and '1' (mode 1),
respectively.
CHAPTER 19
IEBus CONTROLLER (V850/SB2)
Bit 5
Bit 4
Meaning
Meaning
Meaning
Meaning
Meaning
Meaning
Mode 0
Indicates the highest mode supported by unit
Mode 1
Mode 2
Not used
User's Manual U13850EJ6V0UD
Bit 3
Bit 2
Bit 1
Meaning
LSB
Bit 0
Note 4
.
555
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