Event Status Register (Esr) And Event Status Enable (Ese) Register - R&S EB200 Manual

EB200 Manual

4.7.3.3 Event Status Register (ESR) and Event Status Enable (ESE) register

The ESR is already defined in IEEE 488.2. It can be compared with the EVENt section of an SCPI
register. The EVENt status register can be read out using the "*ESR?" command .
The ESE is the associated ENABle section. It can be set using the "*ESE" command and read using
the "*ESE?" command .
Table 4-3 Bit allocation of event status register
Bit No. Meaning
0 Operation Complete
This bit is set on receipt of the command *OPC exactly when all previous commands have been executed.
2 Query Error
This bit is set if either the controller wants to read data from the device without having sent a query, or if it does
not fetch requested data and sends new instructions to the device instead. The cause is often a query which is
faulty and hence cannot be executed.
3 Device-dependent error
This bit is set if a device-dependent error occurs. An error message with a number between -300 and -399 or a
positive error number denoting the error in greater detail is entered into the error queue (see Annex B, Error
Messages).
4 Execution Error
This bit is set if a received command is syntactically correct but cannot be performed for different reasons. An
error message with a number between -200 and -299 denoting the error in greater detail is entered into the error
queue (see Annex B, Error Messages).
Command Error
5
This bit is set if an undefined and syntactically incorrect command is received. An error message with a number
between -100 and -199 denoting the error in greater detail is entered into the error queue (see Annex B, Error
Messages).
Power On (supply voltage on)
7
This bit is set when the device is switched on.
4052.2000.02 4.133
Remote control
E-7