Fig. 4-4 : Status Register Model; Structure Of An Scpi Status Register - R&S EB200 Manual

EB200 Manual

4.7.1 Structure of an SCPI status register

Each SCPI register consists of 5 sections each having a width of 16 bits and different functions (see
Fig. 4-4). The individual bits are independent of each other, ie a bit number being valid for all five
sections is assigned to each hardware status. Bit 3 of the STATus:OPERation register for example is
assigned to the hardware status "SWEeping" in all five sections. Bit 15 (the most significant bit) is set to
zero for all sections. Thus the contents of the register sections can be processed by the controller as
positive integers.
General status register
0
1
2
3
4
5
6
7
+
8
9
10
11
12
13
14
15

Fig. 4-4 : Status register model

CONDition section
PTRansition section
4052.2000.02
P TR an-
CONDition
s ition
0
1
2
3
4
5
6
7
8
.
15
the CONDition section of a register reflects directly the state of the hardware.
This register section can only be read. Its contents is not changed during
reading.
As an alternative, a bit in a CONDition register can also contain the summary
information of a further status register connected in front. In this case, the bit
is cleared on reading out the status register.
the Positive-TRansition section acts as an edge detector. When a bit of the
CONDition section is changed from 0 to 1, the associated PTR bit decides
whether the EVENt bit is set to 1.
PTR bit =1: the EVENt bit is set.
PTR bit =0: the EVENt bit is not set.
This section can be written into and read in any way. Its contents is not
changed during reading.
NTRa n-
EVEN lt
s ition
1
0 0 0 &
1 1 1 &
2 2 2 &
3 3 3 &
4 4 4 &
5 5 5 &
6 6 6 &
7 7 7 &
&
8 8 8
. . .
.
15 15 15
&
& = logical AND
1 = logical OR of all bits
4.128
Remote control
to the higher-order register
ENAB le
0
1
2
3
4
5
6
7
8
.
15
E-7