Status Byte And Srq; Queues; Figure 8-1: Status Byte And Queues - Keithley 3700 series Reference Manual

Section 8: Status Model

Status byte and SRQ

The status byte register receives the summary bits of the five status register sets, a master
summary bit, and two queues. The register sets and queues monitor the various instrument
events. When an enabled event occurs, it sets a summary bit in the status byte register. When a
summary bit of the status byte is set and its corresponding enable bit is set (as programmed by
the user), the RQS/MSS bit will set to indicate that an SRQ has occurred, and the GPIB SRQ
line will be asserted.

Figure 8-1: Status byte and queues

Queues

The Series 3700 uses an output queue and an error queue. The response messages, such as
requested readings, are placed in the output queue. As various programming errors and status
messages occur, they are placed in the error queue. When a queue contains data, it sets the
appropriate summary bit of the status byte register (EAV for the error queue; MAV for the output
queue).
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Series 3700 System Switch/Multimeter Reference Manual
Document Number: 3700S-901-01 Rev. A / August 2007