IBM PowerPC 405GP User Manual page 635

6
EPI
Enable Pulsed IRQ on Transfer Aborted
o
The internal IIC interrupt signal to the
UIC remains active until the status is
cleared, IICOSTS[IRQA] =0.
1 The internal IIC interrupt signal to the
PPC405GP UIC is active for one OPB
clock cycle.
7
SRST Soft Reset
o
Normal operation
1 Soft reset
Writing a 1 to IICO_XTCNTLSS[SRC, SRS, SWC, SWS] clears these fields.
Care must be used when changing IICO_XTCNTLSS[EPI]. If this field changes (from 1 to
°
or from °
to 1) while an interrupt is active, the IIC interrupt signal is asserted to the universal interrupt
controller (UIC).
The IICO_XTCNTLSS[SBSS, SDBF] contain the current status of the Slave Data Buffer, IICO_SDBUF.
When the IICO_SDBUF contains data, IICO_XTCNTLSS[SBDD] is set. When the IICO_SDBF is full,
IICO_XTCNTLSS[SDBF] is set.
The state of the IICO_SDBUF is not instantly recorded by the IICO_XTCNTL[SBSS, SDBF]. The delay
depends on the size of the buffer access. For half-word accesses, these fields are valid on the third
OPB clock following the transfer. For byte accesses, these fields are valid on the second OPB clock
following the transfer.
If any of the following fields: IICO_XTCNTLSS[SRC, SRS, SWC, SWS] = 1 and
IICO_MDCNTL[HSCL]
=
0; no new slave operations will be accepted over the IIC bus. A NACK is
issued until IICO_XTCNTLSS[SRS] or IICO_XTCNTLSS[SRS], and IICO_XTCNTLSS[SRS] or
IICO_XTCNTLSS[SRS], are cleared.
Soft reset, IICO_XTCNTLSS[SRST], provides a last means of recovery from IIC interface or IIC bus
failure. Once enabled, soft reset completely resets the IIC interface. AIIIIC registers are affected. All
transmissions from the IIC interface are terminated. Enabling soft reset during an IIC transmission
may improperly terminate the transmission and hang the IIC bus.
22.3.15 IICO Direct Control Register
The IICO Direct Control Register (IICO_DIRECTCNTL), which controls and monitors the IIC serial
clock (IICSCL) and serial data (IICSDA) signal, is used for error recovery when a malfunction is
detected on the IIC interface.
22-20 PPC405GP User's Manual Preliminary