Debug Status Register (Dbsr) - IBM PowerPC 405GP User Manual

12:13 DV1M Data Value Compare 1 Mode
Type of data comparison used:
00 Undefil1ed
01 AND All bytes selected by DBCR1 [DV1 BE] must
compare to the appropriate bytes of DVC1.
10 OR One of the bytes selected by
DBCR1 [DV1 BE] must compare to the
appropriate bytes of DVC1.
11 AND-OR The upper halfword or lower halfword must
compare to the appropriate halfword in
DVC1. When performing halfword
compares set DBCR1 [DV1 BE]
=
0011,
1100, or 1111.
14:15 DV2M Data Value Compare 2 Mode Type of data comparison used
00 Undefined
01 AND All bytes selected by DBCR1 [DV2BE] must
compare to the appropriate bytes of DVC2.
10 OR
One of the bytes selected by
DBCR1 [DV2BE] must compare to the
appropriate bytes of DVC2.
11 AND-OR The upper halfword or lower halfword must
compare to the appropriate halfword in
DVC2. When performing halfword
compares set DBCR1 [DV2BE]
=
0011,
1100, or 1111.
16:19
DV1BE
Data Value Compare 1 Byte Selects which data bytes to use in data
o
Disabled
value comparison
1 Enabled
20:23 DV2BE Data Value Compare 2 Byte Selects which data bytes to use in data
o
Disabled value comparison
1 Enabled
24:31 Reserved
12.9.2 Debug Status Register (DBSR)
The OSSR contains status on debug events and the most recent reset; the status is obtained by
reading the OSSR. The status bits are normally set by debug events or by any of the three reset
types.
Clearing OSSR fields is performed by writing a word to the OSSR, using the mtdbsr extended
mnemonic, having a 1 in all bit positions to be cleared and a 0 in the all other bit positions. The data
written to the OSSR is not direct data, but a mask. A 1 clears the bit and a 0 has no effect.
Application code should not use the OSSA.
12-12
PPC405GP User's Manual Preliminary