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22.3.9 lIeo Low Slave Address Register
The IICO Low Slave Address Register (IICO_LSADR) and IICO_ High Slave Address Register
(IICO_HSADR) program the slave address of the IIC interface. IICO_HSADR is used only for 10-bit
addressing, and is not programmed in 7-bit addressing mode.
When 7-bit addressing is used, IICO_LSADR is written with the slave address; IICO_HSADR must be
written with zeros. For 7-bit addressing, IICO_LSADR[AO:A6] contain the address transmitted on the
IIC bus; IICO_LSADR[A7] is a don't care.
When 10-bit addressing is used, IICO_LSADR[AO:A7] contain the second address byte transmitted on
the IIC bus.
.
Figure 22-6 illustrates the IICO_LSADR.
AO
A2
A4
A6
...
...
...
...
1011123141s16171
t t t t
A1
A3
A5
A7
Figure 22-12. IICO Low Slave Address Register (IICO_LSADR)
0
AO
Address bit 0
1
A1
Address bit 1
2
A2
Address bit 2
3
A3
Address bit 3
4
A4
Address bit 4
S
AS
Address bit S
6
A6
Address bit 6
LSb for 7 -bit addresses
7
A7
Address bit 7
LSb for 10-bit addresses; don't care for
7-bit addresses
22.3.10 lIeo High Slave Address Register
For 7-bit addressing, set IICO High Slave Address Register (IICO_HSADR) to 0.
To enable 10-bit slave addressing, IICO_HSADR must be programmed to Ob1111
Oyyx,
where yyare
the high-order bits of a 10-bit address and
x
is a don't care .
. Programming Note: IICO_HSADR is used only for 10-bit addressing, and should be set to
°
for
7 -bit addressing mode.
Thus, in 10-bit address mode, IICO_HSADR[A6:A7] contain the two highest -order bits of the 10-bit
address; IICO_HSADR[A7] is a don't care. IICO_LSADR contains the low-order byte of the 10-bit
address.
Figure 22-13 illustrates the IICO_HSADR.
22-14
PPC40SGP User's Manual
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