Ppc405Gp Chip Initialization - IBM PowerPC 405GP User Manual

Embedded processor
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Table 8-4. MMIO Register Contents After Reset (continued)
Register
Bits
Reset Value
Comment
Serial Port (UART)
UARTO_DLL
0:7
OxOOOOOOOO
UARTO_DLM
0:7
OxOOOOOOOO
UARTO_FCR
0:7
OxOOOOOOOO
UARTO_IER
0:7
OxOOOOOOOO
UARTO_IIR
0:7
OxOOOOOO01
UARTO_LCR
0:7
OxOOOOOOOO
UARTO_LSR
0:7
Ox01100000
UARTO_MCR
0:7
OxOOOOOOOO
UARTO_MSR
0:7
OxxxxxOOOO
UARTO_MSR
O : 3
are driven by UARTO_DCD, UARTO RI,
UART1_DSR[UART1_CTS], and UART1 _RTS[UART1_DTR].
UARTO_RBR
0:7
OxOOOOOOOO
UARTO_SCR
0:7
Undefined
UARTO_THR
0:7
OxOOOOOOOO
UART1_DLL
0:7
OxOOOOOOOO
UART1_DLM
0:7
OxOOOOOOOO
UART1_FCR
0:7
OxOOOOOOOO
UARTCIER
0:7
OxOOOOOOOO
UART1_IIR
0:7
OxOOOOOO01
UART1_LCR
0:7
OxOOOOOOOO
UART1_LSR
0:7
Ox01100000
UART1_MCR
0:7
OxOOOOOOOO
UART1_MSR
0:7
Undefined
UART1_RBR
0:7
Undefined
UARTCSCR
0:7
Undefined
UARTCTHR
0:7
OxOOOOOOOO
8.9
PPC405GP Chip Initialization
The on-chip memory (OCM) controller and the universal Interrupt controller (UIC) require initialization
for best performance (in the case of OCM) and proper operation (in the case of the UIC). The UART
controller may require initialization, depending upon the application.
Other peripheral devices can be initialized as appropriate for the system design.
8-12
PPC405GP User's Manual
Preliminary

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