IBM PowerPC 405GP User Manual page 233

Embedded processor
Table of Contents

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5
DOlT
DMA Channel 0 Interrupt Trigger
Must be set to
o.
o
DMA channel 0 interrupt is level-
sensitive.
1 DMA channel 0 interrupt is edge-
sensitive.
6
D11T
DMA Channel 1 Interrupt Trigger
Must be set to
o.
o
DMA channel 1 interrupt is level-
sensitive.
1 DMA channel 1 interrupt is edge-
sensitive.
7
D21T
DMA Channel 2 Interrupt Trigger
Must be set to
o.
o
DMA channel 2 interrupt is level-
sensitive.
1 DMA channel 2 interrupt is edge-
sensitive.
8
D31T
DMA Channel 3 Interrupt Trigger
Must be set to
o.
o
DMA channel 3 interrupt is level-
sensitive.
1 DMA channel 3 interrupt is edge-
sensitive.
9
EWIT
Ethernet Wake-up Interrupt Trigger
Must be set to
o.
o
Ethernet wake-up interrupt is level-
sensitive.
1 Ethernet wake-up interrupt is edge-
sensitive.
10
MSIT
MAL SERR Interrupt Trigger
Must be set to
o.
o
MAL SERR interrupt is level-sensitive.
1 MAL SERR interrupt is edge-sensitive.
11
MTEIT
MAL TX EOB Interrupt Trigger
Must be set to O.
o
MAL TX EOB interrupt is level-sensitive.
1 MAL TX EOB interrupt is edge-sensitive.
12
MREIT
MAL RX EOB Interrupt Trigger
Must be set to
o.
o
MAL RX EOB interrupt is level-sensitive.
1 MAL RX EOB interrupt is edge-sensitive.
13
MTDIT
MAL TX DE Interrupt Trigger
Must be set to
o.
o
MAL TX DE interrupt is level-sensitive.
1 MAL TX DE interrupt is edge-sensitive.
14
MRDIT
MAL RX DE Interrupt Trigger
Must be set to
o.
o
MAL RX DE interrupt is level-sensitive.
1 MAL RX DE interrupt is edge-sensitive.
15
EIT
Ethernet Interrupt Trigger
Must be set to
o.
o
An Ethernet interrupt is level-sensitive.
1 An Ethernet interrupt is edge-sensitive.
16
EPSIT
External PCI SERR Interrupt Trigger
Must be set to
o.
o
External PCI SERR interrupt is level-
sensitive.
1 External PCI SERR interrupt is edge-
sensitive.
10-14
PPC405GP User's Manual
Preliminary

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