Figure 19-15. Mode Register - IBM PowerPC 405GP User Manual

Table 3-13. Directly Accessed MMIO Registers (continued)
Register Address
Access Description
General-Purpose 1/0
GPIOO_OR OxEF600700 RIW GPIOO_IRO Output Register
GPIOO_TCR OxEF600704 RIW GPIOO_IRO Three-State Control Register
GPIOO_ODR OxEF600718 RIW GPIOO_IRO Open Drain Register
GPIOO_IR OxEF60071C R GPIOO_IRO Input Register
Ethernet
EMACO_MRO OxEF600800
RIW Mode Register 0
EMACO_MR1
OxEF600804 RIW Mode Register 1
EMACO_TMRO OxEF600808 RIW Transmit Mode Register 0
EMACO_TMR1 OxEF60080C RIW Transmit Mode Register 1
EMACO_RMR
OxEF600810 RIW Receive Mode Register
EMACO_ISR OxEF600814 RIW Interrupt Status Register
EMACO_ISER OxEF600818 RIW Interrupt Status Enable Register
EMACO_IAHR OxEF60081C RIW Individual Address High
EMACO_IALR OxEF600820 RIW Individual Address Low
EMACO_ VTPID OxEF600824
RIW VLAN TPID Register
EMACO_VTCI OxEF600828
RIW VLAN TCI Register
EMACO_PTR OxEF60082C RIW Pause Timer Register
EMACO_IAHT1 OxEF600830 RIW Individual Address Hash Table 1
EMACO_IAHT2 OxEF600834 RIW Individual Address Hash Table 2
EMACO_IAHT3 OxEF600838
RIW Individual Address Hash Table 3
EMACO_IAHT 4 OxEF60083C RIW Individual Address Hash Table 4
EMACO_GAHT1 OxEF600840 RIW Group Address Hash Table 1
EMACO_GAHT2 OxEF600844 RIW Group Address Hash Table 2
EMACO_GAHT3 OxEF600848 RIW Group Address Hash Table 3
EMACO_GAHT4 OxEF60084C RIW Group Address Hash Table 4
EMACO_LSAH OxEF600850 R Last Source Address Low
EMACO_LSAL OxEF600854 R Last Source Address High
EMACO_IPGVR
OxEF600858 RIW Inter-Packet Gap Value Register
EMACO_STACR
OxEF60085C RIW STA Control Register
EMACO_TRTR OxEF600860 RIW Transmit Request Threshold Register
EMACO_RWMR OxEF600864 RIW Receive Low/High Water Mark Register
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PPC405GP User's Manual Preliminary