IBM PowerPC 405GP User Manual page 591

Embedded processor
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EVB
DE
aTE
PEIN
~
1 0 11
f
10111112113114115116
...
...
...
f
t
f
f
f
CID
ONE
OSE
DEI
OTEI PBEI
Figure 20-18. MAL Error Status Register (MALO_ESR)
0
EVB
Error Valid Bit
When this bit is set, bits 1-6 include the
10
OBit 1: 15 are available for latching new
of the erroneous channel (in case of OPB
error information.
errors). Bits 11-15 indicate the type of
1 Bits 1: 15 contain last error. A new
error.
error cannot be latched.
In non-locked mode, the error indication
describes the last error that had occurred.
In locked mode, the error is the first one
that had occurred after this bit was
cleared.
This bit is set when an error occurs and
remains set until reset by the software. In
locked mode, new errors cannot be
latched in the error lock indication fields if
this bit is set
1 :6
CID
Channel
10
This field contains the number of the
channel which caused the locked error.
Bit 1 indicates whether the channel
10
represents an RX channel (1) or a TX
channel (0).
Bits 2:6 indicates the number of the
channel that caused the error.
Note: An error on the PLB cannot be
related to a channel. The error
condition may be resolved by using
the error information optionally
locked in the PLB slave.
7:10
",;
. . . .
'
...
'
I.' , ,>.
·<i
Reserved
11
DE
Descriptor Error
Indicates that the error is a non-valid
o
No error
descriptor, which is
not
the first descriptor
1 Non-valid descriptor
in a TX packet.
12
ONE
OPB Non-fullword Error
Indicates that the error is a non-fullword
o
No error
acknowledge asserted by an OPB slave.
1 Non-fullword asserted
13
aTE
OPB Timeout Error
Indicates the error is an OPB timeout.
o
No error
1 OPB timeout
14
OSE
OPB Slave Error
Indicates the error is an error indication
o
No error
asserted by an OPB slave.
1 OPB slave error
15
PEIN
PLB Bus Error Indication
When this bit is set, the detected error is a
o
No error
PLB error. There is no meaning to the
1 PLB bus error
Channel
10
field in this case.
20-30
PPC405GP User's Manuai
Preiiminary

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