IBM PowerPC 405GP User Manual page 14

Peripheral Bus Error Status Register 1 (EBCO_BESR1) ......................................................................... 16-32
Chapter 17. PCllnterface ..........
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.......................................................................................... 17-1
PCI Overview ................................................................................................................................................. 17-1
PCI Bridge Features .................................................................................................................................. 17-1
PCI Bridge Block Diagram ......................................................................................................................... 17-2
Byte Ordering ............................................................................................................................................ 17-2
Reference Information .............................................................................................................................. 17-3
PCI Bridge Functional Blocks ......................................................................................................................... 17-4
PLB-to-PCI Half-Bridge ............................................................................................................................. 17-4
PCI-to-PLB Half-Bridge ............................................................................................................................. 17-5
PCI Arbiter ................................................................................................................................................. 17-5
PCI Bridge Address Mapping ......................................................................................................................... 17-6
PLB-to-PCI Address Mapping ................................................................................................................... 17-6
PCI-to-PLB Address Mapping ................................................................................................................... 17-8
PCI Target Map Configuration ................................................................................................................... 17-9
PCI Bridge Transaction Handling ................................................................................................................. 17-10
PLB-to-PCI Transaction Handling ........................................................................................................... 17-10
PCI Master Commands ....................................................................................................................... 17-10
PLB Slave Read Handling .................................................................................................................. 17-12
Prefetching .......................................................................................................................................... 17-12
, PLB Slave Write Handling ............................ ............ .......... ...... .......................................... ................ 17-12
Aborted PLB Requests ....................................................................................................................... 17-13
Retried PCI Reads .............................................................................................................................. 17-13
PCI-to-PLB Transaction Handling ........................................................................................................... 17-13
PLB Master Commands ...................................................................................................................... 17-14
Handling of Reads from PCI Masters ................................................................................................. 17-15
Handling Writes from PCI Masters ...................................................................................................... 17-17
Miscellaneous ..................................................................................................................................... 17-17
Completion Ordering .... ..... ....................... .............. ......... .............................. ..... ..................................... 17-18
PCI Producer-Consumer Model ........... .............. ....................................... ........ ............... ................... 17-18
Collision Resolution ................................................................................................................................. 17-18
PCI Bridge Configuration Registers ............................................................................................................. 17-19
PCI Bridge Register Summary ................................................................................................................ 17-19
PCI Bridge Local Configuration Registers ............................................................................................... 17-21
PMM
°
Local Address Register (PCILO_PMMOLA) ............................................................................ 17-21
PMM
°
Mask/Attribute Register (PCILO_PMMOMA) ........................................................................... 17-22
PMM
°
PCI Low Address Register (PCILO_PMMOPCILA) ................................................................. 17-22
PMM
°
PCI High Address Register (PCILO_PMMOPCIHA) ................................................................ 17-23
PMM 1 Local Address Register (PCILO_PMM1 LA) ............................................................................ 17-23
PMM 1 Mask/Attribute Register (PCILO_PMM1 MA) ......... : ................................................................. 17-24
PMM 1 PCI Low Address Register (PCILO_PMM1 PCILA) ................................................................. 17-24
PMM 1 PCI High Address Register (PCILO_PMM1PCIHA) ................................................................ 17-25
PMM 2 Local Address Register (PCILO_PMM2LA) ............................................................................ 17-25
PMM 2 Mask/Attribute Register (PCILO_PMM2MA) ........................................................................... 17-25
PMM 2 PCI Low Address Register (PCILO_PMM2PCILA) ................................................................. 17-26
PMM 2 PCI High Address Register (PCILO_PMM2PCIHA) ................................................................ 17-27
PTM 1 Memory Size/Attribute Register (PCILO_PTM1 MS) ................................................................ 17-27
PTM 1 Local Address Register (PCILO_PTM1 LA) .............................................................................. 17-27
PTM 2 Memory Size/Attribute Register (PCILO_PTM2MS) ................................................................ 17-28
PTM 2 Local Address Register (PCILO_PTM2LA) .............................................................................. 17-28
PCI Configuration Registers .................................................................................................................... 17-29
PCI Configuration Address Register (PCICO_CFGADDR) ................................................................. 17-29
PCI Configuration Data Register (PCICO_CFGDATA) ....................................................................... 17-30
PCI Vendor ID Register (PCICO_VENDID) ......................................................................................... 17-31
PCI Device ID Register (PCICO_DEVID) ............................................................................................ 17-31
Preliminary Contents
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