Cltapc Data Register Table; Clidcode; Clbypass; Cltapc_Select - Intel Quark SoC X1000 User Manual

2.3

CLTAPC Data Register Table

Table 4. CLTAPC TAP Data Registers
TDR Name

CLIDCODE

CLBYPASS

CLTAPC_SELECT

CLTAPC_CPU_VPREQ
CLTAPC_CPU_TAPSTATUS
CLTAPC_CPU_VPRDY
CLTAPC_TAPNW_STATUS
† The external power supply signal is used for PWR_GOOD. These values survive a board reset if
the power supply is still connected to the board.
2.3.1 CLIDCODE
The CLTAPC IDCODE register is 32 bits in size. This value may be used by Debug
Software to confirm there is a working JTAG connection to the board and to confirm
the identity of the SoC.
The Intel
2.3.2 CLBYPASS
This is the IEEE standard BYPASS data register; it is one bit in size.
2.3.3

CLTAPC_SELECT

This data register contains bits that control the presence of the children TAPs in the
SoC on the JTAG chain.
Table 5. CLTAPC_SELECT
CLTAPC_SELECT
Bit Number
1:0
63:2
When bits 1:0 are set to the value 01 by Debug Software, the CPU Core TAP is added
to the JTAG chain immediately after the CLTAPC.
8
TDR Length (Bits)
®
Quark SoC X1000 IDCODE is 0x0E681013.
Name
CPUCORE_TAP_SEL
RESERVED
Reset Mechanism
32b TRST/SYNC TAP RST
1b TRST/SYNC TAP RST
64b TRST/SYNC TAP RST
8b PWR_GOOD†
8b PWR_GOOD†
1b PWR_GOOD†
64b PWR_GOOD†
Reset Value
2'b00
2'b00
JTAG Interface
Access
Read-Only
Read-Write
Read-Write
Read-Write
Read-Only
Read-Write
Read-Write
Comments
2'b01 = Normal;
2'b10 = Excluded;
2'b11 = Shadow
RESERVED
Order Number: 329866-002US