Texas Instruments TMS320C6722 User Manual page 99

www.ti.com
BYTE ADDRESS
0x4200 0088 RTIINTFLAG
0x4200 0090 RTIDWDCTRL
0x4200 0094 RTIDWDPRLD
0x4200 0098 RTIWDSTATUS
0x4200 009C RTIWDKEY
0x4200 00A0 RTIDWDCNTR
Figure 4-41 shows the bit layout of the CFGRTI register and
31
7 6
Reserved
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-37. CFGRTI Register Bit Field Description (0x4000 0014)
BIT NO. NAME
31:7,3 Reserved
6:4 CAPSEL1
2:0 CAPSEL0
Submit Documentation Feedback
Table 4-36. RTI Registers (continued)
REGISTER NAME
Interrupt Flags. Interrupt pending bits.
Digital Watchdog Control. Enables the Digital Watchdog.
Digital Watchdog Preload. Sets the experation time of the Digital Watchdog.
Watchdog Status. Reflects the status of Analog and Digital Watchdog.
Watchdog Key. Correct written key values discharge the external capacitor.
Digital Watchdog Down-Counter
CAPSEL1
R/W, 0
Figure 4-41. CFGRTI Register Bit Layout (0x4000 0014)
RESET READ
VALUE WRITE
N/A N/A Reads are indeterminate. Only 0s should be written to these bits.
0 R/W CAPSEL0 selects the input to the RTI Input Capture 0 function.
CAPSEL1 selects the input to the RTI Input Capture 1 function.
0 R/W
The encoding is the same for both fields:
000 = Select McASP0 Transmit DMA Event
001 = Select McASP0 Receive DMA Event
010 = Select McASP1 Transmit DMA Event
011 = Select McASP1 Receive DMA Event
100 = Select McASP2 Transmit DMA Event
101 = Select McASP2 Receive DMA Event
Other values are reserved and their effect is not determined.
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
DESCRIPTION
Table 4-37
Reserved
4 3
Reserved
DESCRIPTION
SPRS268E – MAY 2005 – REVISED JANUARY 2007
contains a description of the bits.
2
CAPSEL0
R/W, 0
Peripheral and Electrical Specifications
8
0
99