Texas Instruments TMS320C6722 User Manual page 73

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Figure 4-26 shows the bit layout of the CFGMCASP0 register and
bits.
31
7
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 4-19. CFGMCASP0 Register Bit Field Description (0x4000 0018)
BIT NO. NAME
31:3 Reserved
2:0 AMUTEIN0
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Reserved
Figure 4-26. CFGMCASP0 Register Bit Layout (0x4000 0018)
RESET READ
VALUE WRITE
N/A N/A Reads are indeterminate. Only 0s should be written to these bits.
0 R/W AMUTEIN0 Selects the source of the input to the McASP0 mute input.
000 = Select the input to be a constant '0'
001 = Select the input from AXR0[7]/SPI1_CLK
010 = Select the input from AXR0[8]/AXR1[5]/SPI1_SOMI
011 = Select the input from AXR0[9]/AXR1[4]/SPI1_SIMO
100 = Select the input from AHCLKR2
101 = Select the input from SPI0_SIMO
110 = Select the input from SPI0_SCS/I2C1_SCL
111 = Select the input from SPI0_ENA/I2C1_SDA
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
Table 4-19
Reserved
3
DESCRIPTION
Peripheral and Electrical Specifications
contains a description of the
2
AMUTEIN0
R/W, 0
8
0
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