Texas Instruments TMS320C6722 User Manual page 82

TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
4.14.2 SPI Peripheral Registers Description(s)
Table 4-24 is a list of the SPI registers.
SPI0
BYTE ADDRESS BYTE ADDRESS
0x4700 0000
0x4700 0004
0x4700 0008
0x4700 000C
0x4700 0010
0x4700 0014
0x4700 0018
0x4700 001C
0x4700 0020
0x4700 0024
0x4700 0028
0x4700 002C
0x4700 0030
0x4700 0034
0x4700 0038
0x4700 003C
0x4700 0040
0x4700 0044
0x4700 0048
0x4700 004C
0x4700 0050
0x4700 0054
0x4700 0058
0x4700 005C
0x4700 0060
0x4700 0064
82 Peripheral and Electrical Specifications
Table 4-24. SPIx Configuration Registers
SPI1
REGISTER NAME
0x4800 0000 SPIGCR0
0x4800 0004 SPIGCR1
0x4800 0008 SPIINT0
0x4800 000C SPILVL
0x4800 0010 SPIFLG
0x4800 0014 SPIPC0
0x4800 0018 SPIPC1
0x4800 001C SPIPC2
0x4800 0020 SPIPC3
0x4800 0024 SPIPC4
0x4800 0028 SPIPC5
0x4800 002C Reserved
0x4800 0030 Reserved
0x4800 0034 Reserved
0x4800 0038 SPIDAT0
0x4800 003C SPIDAT1
0x4800 0040 SPIBUF
0x4800 0044 SPIEMU
0x4800 0048 SPIDELAY
0x4800 004C SPIDEF
0x4800 0050 SPIFMT0
0x4800 0054 SPIFMT1
0x4800 0058 SPIFMT2
0x4800 005C SPIFMT3
0x4800 0060 TGINTVECT0
0x4800 0064 TGINTVECT1
DESCRIPTION
Global Control Register 0
Global Control Register 1
Interrupt Register
Interrupt Level Register
Flag Register
Pin Control Register 0 (Pin Function)
Pin Control Register 1 (Pin Direction)
Pin Control Register 2 (Pin Data In)
Pin Control Register 3 (Pin Data Out)
Pin Control Register 4 (Pin Data Set)
Pin Control Register 5 (Pin Data Clear)
Reserved - Do not write to this register
Reserved - Do not write to this register
Reserved - Do not write to this register
Shift Register 0 (without format select)
Shift Register 1 (with format select)
Buffer Register
Emulation Register
Delay Register
Default Chip Select Register
Format Register 0
Format Register 1
Format Register 2
Format Register 3
Interrupt Vector for SPI INT0
Interrupt Vector for SPI INT1
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