Texas Instruments TMS320C6722 User Manual page 62

TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
4.12.3 UHPI Electrical Data/Timing
4.12.3.1 Universal Host-Port Interface (UHPI) Read and Write Timing
Table 4-15 and Table 4-16
through Figure 4-24).
NO.
9 t
su(HASL-DSL)
10 t
h(DSL-HASL)
11 t
su(HAD-HASL)
12 t
h(HASL-HAD)
13 t
w(DSL)
14 t
w(DSH)
15 t
su(HAD-DSL)
16 t
h(DSL-HAD)
17 t
su(HD-DSH)
18 t
h(DSH-HD)
37 t
su(HCSL-DSL)
38 t
h(HRDYH-DSL)
(1) P = SYSCLK2 period
(2) DS refers to HSTROBE. HD refers to UHPI_HD[31:0]. HDS refers to UHPI_HDS[1] or UHPI_HDS[2]. HAD refers to UHPI_HCNTL[0],
UHPI_HCNTL[1], UHPI_HHWIL, and UHPI_HRW.
62 Peripheral and Electrical Specifications
assume testing over recommended operating conditions (see
Table 4-15. UHPI Read and Write Timing Requirements
Setup time, UHPI_HAS low before DS falling edge
Hold time, UHPI_HAS low after DS falling edge
Setup time, HAD valid before UHPI_HAS falling edge
Hold time, HAD valid after UHPI_HAS falling edge
Pulse duration, DS low
Pulse duration, DS high
Setup time, HAD valid before DS falling edge
Hold time, HAD valid after DS falling edge
Setup time, HD valid before DS rising edge
Hold time, HD valid after DS rising edge
Setup time, UHPI_HCS low before DS falling edge
Hold time, DS low after UHPI_HRDY rising edge
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Figure 4-21
(1) (2)
MIN MAX UNIT
5 ns
2 ns
5 ns
5 ns
15 ns
2P ns
5 ns
5 ns
5 ns
0 ns
0 ns
1 ns
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