Texas Instruments TMS320C6722 User Manual page 71

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Table 4-18. McASP Registers Accessed Through Peripheral Configuration Bus (continued)
McASP0 McASP1
BYTE BYTE
ADDRESS ADDRESS
0x4400 00C8 0x4500 00C8
0x4400 00CC 0x4500 00CC
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
– –
0x4400 0180 0x4500 0180
0x4400 0184 0x4500 0184
0x4400 0188 0x4500 0188
0x4400 018C 0x4500 018C
0x4400 0190 0x4500 0190
0x4400 0194 0x4500 0194
0x4400 0198 –
0x4400 019C –
0x4400 01A0 –
0x4400 01A4 –
0x4400 01A8 –
0x4400 01AC –
0x4400 01B0 –
0x4400 01B4 –
0x4400 01B8 –
0x4400 01BC –
0x4400 0200 0x4500 0200
0x4400 0204 0x4500 0204
0x4400 0208 0x4500 0208
(1) Writes to XRBUF originate from peripheral configuration bus only when XBUSEL = 1 in XFMT.
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McASP2
REGISTER
BYTE
NAME
ADDRESS
0x4600 00C8 XCLKCHK
0x4600 00CC XEVTCTL
0x4600 0100 DITCSRA0
0x4600 0104 DITCSRA1
0x4600 0108 DITCSRA2
0x4600 010C DITCSRA3
0x4600 0110 DITCSRA4
0x4600 0114 DITCSRA5
0x4600 0118 DITCSRB0
0x4600 011C DITCSRB1
0x4600 0120 DITCSRB2
0x4600 0124 DITCSRB3
0x4600 0128 DITCSRB4
0x4600 012C DITCSRB5
0x4600 0130 DITUDRA0
0x4600 0134 DITUDRA1
0x4600 0138 DITUDRA2
0x4600 013C DITUDRA3
0x4600 0140 DITUDRA4
0x4600 0144 DITUDRA5
0x4600 0148 DITUDRB0
0x4600 014C DITUDRB1
0x4600 0150 DITUDRB2
0x4600 0154 DITUDRB3
0x4600 0158 DITUDRB4
0x4600 015C DITUDRB5
0x4600 0180 SRCTL0
0x4600 0184 SRCTL1
– SRCTL2
– SRCTL3
– SRCTL4
– SRCTL5
– SRCTL6
– SRCTL7
– SRCTL8
– SRCTL9
– SRCTL10
– SRCTL11
– SRCTL12
– SRCTL13
– SRCTL14
– SRCTL15
(1)
0x4600 0200 XBUF0
(1)
0x4600 0204 XBUF1
(1)
– XBUF2
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
DESCRIPTION
Transmit clock check control register
Transmitter DMA event control register
Left channel status register 0
Left channel status register 1
Left channel status register 2
Left channel status register 3
Left channel status register 4
Left channel status register 5
Right channel status register 0
Right channel status register 1
Right channel status register 2
Right channel status register 3
Right channel status register 4
Right channel status register 5
Left channel user data register 0
Left channel user data register 1
Left channel user data register 2
Left channel user data register 3
Left channel user data register 4
Left channel user data register 5
Right channel user data register 0
Right channel user data register 1
Right channel user data register 2
Right channel user data register 3
Right channel user data register 4
Right channel user data register 5
Serializer control register 0
Serializer control register 1
Serializer control register 2
Serializer control register 3
Serializer control register 4
Serializer control register 5
Serializer control register 6
Serializer control register 7
Serializer control register 8
Serializer control register 9
Serializer control register 10
Serializer control register 11
Serializer control register 12
Serializer control register 13
Serializer control register 14
Serializer control register 15
Transmit buffer register for serializer 0
Transmit buffer register for serializer 1
Transmit buffer register for serializer 2
Peripheral and Electrical Specifications 71