Inter-Integrated Circuit Serial Ports (I2C0, I2C1) - Texas Instruments TMS320C6722 User Manual

Floating-point digital signal processors
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4.15 Inter-Integrated Circuit Serial Ports (I2C0, I2C1)

4.15.1 I2C Device-Specific Information
Having two I2C modules on the C672x simplifies system architecture, since one module may be used by
the DSP to control local peripherals ICs (DACs, ADCs, etc.) while the other may be used to communicate
with other controllers in a system or to implement a user interface.
C672x I2C Module.
Each I2C port supports:
Compatible with Philips
Fast Mode up to 400 Kbps (no fail-safe I/O buffers)
Noise Filter to Remove Noise 50 ns or less
Seven- and Ten-Bit Device Addressing Modes
Master (Transmit/Receive) and Slave (Transmit/Receive) Functionality
Events: DMA, Interrupt, or Polling
General-Purpose I/O Capability if not used as I2C
The C672x I2C pins use a standard 8 mA LVCMOS buffer, not the slow I/O buffer
defined in the I2C specification. Series resistors may be necessary to reduce noise at
the system level.
C672x I2C Module
Noise
I2Cx_SCL
Filter
Noise
I2Cx_SDA
Filter
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I2C Specification Revision 2.1 (January 2000)
Clock Prescaler
Prescaler
I2CPSCx
Register
Bit Clock Generator
Clock Divide
I2CCLKHx
High Register
Clock Divide
I2CCLKLx
Low Register
Transmit
Transmit Shift
I2CXSRx
Register
I2CDXRx
Transmit Buffer
Receive
Receive Buffer
I2CDRRx
Receive Shift
I2CRSRx
Register
Control
Pin Function
I2CPFUNC
Register
Pin Direction
I2CPDIR
Register
Pin Data In
I2CPDIN
Register
Figure 4-37. I2C Module Block Diagram
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
Figure 4-37
CAUTION
Control
Control
I2CCOARx
I2CSARx
I2CCMDRx
I2CEMDRx
I2CCNTx
I2CPID1
I2CPID2
Interrupt/DMA
I2CIERx
I2CSTRx
I2CSRCx
I2CPDOUT
I2CPDSET
I2CPDCLR
Peripheral and Electrical Specifications
is block diagram of the
Own Address
Register
Slave Address
Register
Mode Register
Extended Mode
Register
Data Count
Peripheral
Register
Configuration
Bus
Peripheral ID
Register 1
Peripheral ID
Register 2
Interrupt Enable
Interrupt DMA
Register
Requests
Interrupt Status
Register
Interrupt Source
Register
Pin Data Out
Register
Pin Data Set
Register
Pin Data Clear
Register
93

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