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Section 7: TSP command reference
For information about .condition, .enable, .event, .ntr, and .ptr registers, refer to
contents
(on page 15-1) and
this register are defined in the following table.
Bit
Value and description
status.operation.instrument.lan.CONNECTION
B0
status.operation.instrument.lan.CON
Set bit indicates that the LAN cable is connected and a link has been detected.
Bit B0 decimal value: 1
status.operation.instrument.lan.CONFIGURING
B1
status.operation.instrument.lan.CONF
Set bit indicates the LAN is performing its configuration sequence.
Bit B1 decimal value: 2
Not used
B2 to B9
status.operation.instrument.lan.TRIGGER_OVERRUN
B10
status.operation.instrument.lan.TRGOVR
Set bit indicates one or more enabled bits for the operation status LAN trigger overrun register is
set.
Bit B10 decimal value: 1,024
B11 to B15 Not used
As an example, to set bit B0 of the operation status LAN summary enable register, set
status.operation.instrument.lan.enable =
status.operation.instrument.lan.CON.
In addition to the above constants, operationRegister can be set to the numeric equivalent of the
bit to set. To set more than one bit of the register, set operationRegister to the sum of their
decimal weights. For example, to set bits B1 and B10, set operationRegister to 1,026 (which is
the sum of 2 + 1024).
Bit
Binary value
Decimal
Weights
Bit
Binary value
Decimal
Weights
Example 1
operationRegister = status.operation.instrument.lan.CONF +
status.operation.instrument.lan.TRGOVR
status.operation.instrument.lan.enable = operationRegister
Use constants to set bit B1 and bit B10 of the operation status LAN summary enable register.
7-340
Model 2651A High Power System SourceMeter® Instrument Reference Manual
Enable and transition registers
B7
B6
B5
0/1
0/1
0/1
128
64
32
7
6
5
(2
)
(2
)
(2
)
B15
B14
B13
0/1
0/1
0/1
32,768
16,384
8,192
15
14
13
(2
)
(2
)
(2
)
(on page 15-19). The individual bits of
B4
B3
B2
0/1
0/1
0/1
16
8
4
4
3
2
(2
)
(2
)
(2
)
B12
B11
B10
0/1
0/1
0/1
4,096
2,048
1,024
12
11
10
(2
)
(2
)
(2
)
2651A-901-01 Rev. C October 2021
Status register set
B1
B0
0/1
0/1
2
1
1
0
(2
)
(2
)
B9
B8
0/1
0/1
512
256
9
8
(2
)
(2
)
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