Tektronix Keithley 2651A Reference Manual page 657

Section 7: TSP command reference
Bit Value and description
status.MEASUREMENT_SUMMARY_BIT
B0
status.MSB
Set summary bit indicates that an enabled measurement event has occurred.
Bit B0 decimal value: 1
status.SYSTEM_SUMMARY_BIT
B1
status.SSB
Set summary bit indicates that an enabled system event has occurred.
Bit B1 decimal value: 2
status.ERROR_AVAILABLE
B2
status.EAV
Set summary bit indicates that an error or status message is present in the error queue.
Bit B2 decimal value: 4
status.QUESTIONABLE_SUMMARY_BIT
B3
status.QSB
Set summary bit indicates that an enabled questionable event has occurred.
Bit B3 decimal value: 8
status.MESSAGE_AVAILABLE
B4
status.MAV
Set summary bit indicates that a response message is present in the output queue.
Bit B4 decimal value: 16
status.EVENT_SUMMARY_BIT
B5
status.ESB
Set summary bit indicates that an enabled standard event has occurred.
Bit B5 decimal value: 32
status.MASTER_SUMMARY_STATUS
B6
status.MSS
Request Service (RQS)/Master Summary Status (MSS). Depending on how it is used, bit B6 of
the status byte register is either the Request for Service (RQS) bit or the Master Summary Status
(MSS) bit:
Bit B6 decimal value: 64
status.OPERATION_SUMMARY_BIT
B7
status.OSB
Set summary bit indicates that an enabled operation event has occurred.
Bit B7 decimal value: 128
In addition to the above constants, when more than one bit of the register is set, statusByte equals
the sum of their decimal weights. For example, if 129 is returned, bits B0 and B7 are set (1 + 128).
Bit
Binary value
Decimal
Weights
7-312
Model 2651A High Power System SourceMeter® Instrument Reference Manual
▪
When using the GPIB or VXI-11 serial poll sequence of the Model 2651A to obtain the
status byte (serial poll byte), B6 is the RQS bit. The set bit indicates that the Request
Service (RQS) bit of the status byte (serial poll byte) is set and a serial poll (SRQ) has
occurred.
▪
When using the status.condition register command or the *STB? common command
to read the status byte, B6 is the MSS bit. Set bit indicates that an enabled summary bit of
the status byte register is set.
B7 B6
0/1 0/1
128 64
7 6
(2 ) (2 )
B5 B4 B3
0/1 0/1 0/1
32 16 8
5 4 3
(2 ) (2 ) (2 )
B2 B1 B0
0/1 0/1 0/1
4 2 1
2 1 0
(2 ) (2 ) (2 )
2651A-901-01 Rev. C October 2021