Operations Of 8-Bit Timer/Event Counters 50 And 51; Interval Timer (8-Bit) Operation - NEC mPD780024AS Series Preliminary User's Manual

7.4 Operations of 8-Bit Timer/Event Counters 50 and 51

7.4.1 Interval timer (8-bit) operation

The 8-bit timer/event counters operate as interval timers which generate interrupt requests repeatedly at intervals
of the count value preset to 8-bit timer compare register 5n (CR5n).
When the count values of the 8-bit timer counter 5n (TM5n) match the values set to CR5n, counting continues with
the TM5n values cleared to 0 and the interrupt request signals (INTTM5n) are generated.
The count clock of the TM5n can be selected with bits 0 to 2 (TCL5n0 to TCL5n2) of the timer clock select register
5n (TCL5n).
See 7.5 Cautions for 8-Bit Timer/Event Counters 50 and 51 (2) about the operation when the compare register
value is changed during timer count operation.
[Setting]
<1> Set the registers.
• TCL5n: Select count clock
• CR5n: Compare value
• TMC5n: Clear and start mode by match of TM5n and CR5n
(TMC5n = 0000×××0B × = don't care)
<2> After TCE5n = 1 is set, count operation starts.
<3> If the values of TM5n and CR5n match, INTTM5n is generated (TM5n is cleared to 00H).
<4> INTTM5n generates repeatedly at the same interval. Set TCE5n to 0 to stop count operation.
Remark n = 0, 1
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CHAPTER 7 8-BIT TIMER/EVENT COUNTERS 50 AND 51
Preliminary User's Manual U16035EJ1V0UM