Ddr4 Dimm2 Interface - Intel Agilex F Series User Manual

Fpga (two f-tiles) development kit
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Schematic Signal Name FPGA Pin Number
DDR4_DIMM1_A15
DDR4_DIMM1_A14
DDR4_DIMM1_A13
DDR4_DIMM1_A12
DDR4_DIMM1_A11
DDR4_DIMM1_A10
DDR4_DIMM1_A9
DDR4_DIMM1_A8
DDR4_DIMM1_A7
DDR4_DIMM1_A6
DDR4_DIMM1_A5
DDR4_DIMM1_A4
DDR4_DIMM1_A3
DDR4_DIMM1_A2
DDR4_DIMM1_A1
DDR4_DIMM1_A0
DDR4_DIMM1_PAR
DDR4_DIMM1_CS_N1
DDR4_DIMM1_CK_N0
DDR4_DIMM1_CK_P0
DDR4_DIMM1_CKE1
DDR4_DIMM1_CKE0
DDR4_DIMM1_ODT1
DDR4_DIMM1_ODT0
DDR4_DIMM1_ACT_N
DDR4_DIMM1_CS_N0
DDR4_DIMM1_RESET_N
DDR4_DIMM1_BG1
A.5.6. DDR4 DIMM2 Interface
The Intel Agilex FPGA (two F-tiles) development board provides two DDR4 x72 DIMM
interfaces connected to the FPGA fabric. DIMM2 is connected to the Intel Agilex I/O96
of banks 2E and 2F. Only one DIMM memory module is included with the development
kit for evaluation of the DIMM interfaces.
®
Intel
Agilex
F-Series FPGA (Two F-Tiles) Development Kit User Guide
52
I/O Standard
CT26
1.2 V HS LVCMOS
CW27
1.2 V HS LVCMOS
CV26
1.2 V HS LVCMOS
CR29
1.2 V HS LVCMOS
CR31
1.2 V HS LVCMOS
CT30
1.2 V HS LVCMOS
CW31
1.2 V HS LVCMOS
CV30
1.2 V HS LVCMOS
CR33
1.2 V HS LVCMOS
CT32
1.2 V HS LVCMOS
CW33
1.2 V HS LVCMOS
CV32
1.2 V HS LVCMOS
CR35
1.2 V HS LVCMOS
CT34
1.2 V HS LVCMOS
CW35
1.2 V HS LVCMOS
CV34
1.2 V HS LVCMOS
CL31
1.2 V HS LVCMOS
CK30
1.2 V HS LVCMOS
CN31
1.2 V HS LVCMOS
CP30
1.2 V HS LVCMOS
CL33
1.2 V HS LVCMOS
CK32
1.2 V HS LVCMOS
CN33
1.2 V HS LVCMOS
CP32
1.2 V HS LVCMOS
CL35
1.2 V HS LVCMOS
CK34
1.2 V HS LVCMOS
CN35
1.2 V HS LVCMOS
CP34
1.2 V HS LVCMOS
A. Development Kit Components
Description
DDR4 DIMM1 Address 15
DDR4 DIMM1 Address 14
DDR4 DIMM1 Address 13
DDR4 DIMM1 Address 12
DDR4 DIMM1 Address 11
DDR4 DIMM1 Address 10
DDR4 DIMM1 Address 9
DDR4 DIMM1 Address 8
DDR4 DIMM1 Address 7
DDR4 DIMM1 Address 6
DDR4 DIMM1 Address 5
DDR4 DIMM1 Address 4
DDR4 DIMM1 Address 3
DDR4 DIMM1 Address 2
DDR4 DIMM1 Address 1
DDR4 DIMM1 Address 0
DDR4 DIMM1 Parity
DDR4 DIMM1 Chip Select 1
DDR4 DIMM1 Clock 0,
Positive
DDR4 DIMM1 Clock 0,
Negative
DDR4 DIMM1 Clock Enable 1
DDR4 DIMM1 Clock Enable 0
DDR4 DIMM1 On Die Termination 1
DDR4 DIMM1 On Die Termination 0
DDR4 DIMM1 Activate Command
DDR4 DIMM1 Chip Select 0
DDR4 DIMM1 Reset
DDR4 DIMM1 Bank Group 1
739942 | 2022.09.21
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