Jumper Description - Intel Agilex F Series User Manual

A. Development Kit Components
739942 | 2022.09.21
Table 20. Supported Configuration Modes
is tied to logic high.
MSEL0
Configuration Mode
JTAG
Avalon-ST x16
AS x4 Fast (CVP support)
AS x4 Normal
Table 21. SW4
Switch position
1 SSEN
2 CXL REFCLK Select
3 PCIe REFCLK Select
4 PCIe Clock Power-down
Table 22. SW5—Slide Switch to Power On the Board
Switch position
SW5
Table 23. SW6—Single DIP for Intel MAX 10 JTAG Enable
Switch position
SW6 Intel MAX 10 JTAG Enable
Table 24. S[1–4, 6]—Various Push-Button RESET Switches
Switch
S1
S2
S3
S4
S6
A.3.2. Jumper Description
In Avalon-ST x16 configuration mode, the board provides one QSPI flash for storing up
to four configuration images. Configuration of the FPGA with one of these images is
managed by the Intel MAX 10, depending on the selection of jumpers J105 and J106.
Send Feedback
Board Label
Board Label
Power On ON to power on the board
Board Label
Used to send RESET to CPU
Used to send RESET to HPS
Used to send PERSTN to PCIe
Used to send 2nd PERSTN to PCIe
Used to send PERSTN to CXL PCIe
MSEL2
1
1
0
0
Function
ON enables PCIe Spread Spectrum
ON for local PCIe REFCLK on Bank12C
ON for local PCIe REFCLK on Bank13A
On powers down PCIe clock sources
Function
Function
ON to share Intel MAX 10 JTAG Pins
Function
® ™
Intel Agilex F-Series FPGA (Two F-Tiles) Development Kit User Guide
MSEL1 MSEL0
1 1
0 1
0 1
1 1
Default Position
OFF
OFF
OFF
OFF
Default Position
OFF
Default Position
OFF
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