Intel Agilex F Series User Manual page 45

A. Development Kit Components
739942 | 2022.09.21
Table 30. QSFP-DD Pin Assignments
Schematic Signal Name
QSFPDD_TX0_P
QSFPDD_TX0_N
QSFPDD_TX1_P
QSFPDD_TX1_N
QSFPDD_TX2_P
QSFPDD_TX2_N
QSFPDD_TX3_P
QSFPDD_TX3_N
QSFPDD_TX4_P
QSFPDD_TX4_N
QSFPDD_TX5_P
QSFPDD_TX5_N
QSFPDD_TX6_P
QSFPDD_TX6_N
QSFPDD_TX7_P
QSFPDD_TX7_N
QSFPDD_RX0_P
QSFPDD_RX0_N
QSFPDD_RX1_P
QSFPDD_RX1_N
QSFPDD_RX2_P
QSFPDD_RX2_N
QSFPDD_RX3_P
QSFPDD_RX3_N
QSFPDD_RX4_P
QSFPDD_RX4_N
QSFPDD_RX5_P
QSFPDD_RX5_N
QSFPDD_RX6_P
QSFPDD_RX6_N
QSFPDD_RX7_P
QSFPDD_RX7_N
QSFPDD_REFCLK_P
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FPGA Pin Number I/O Standard
AV52 True Differential Signaling
AU51 True Differential Signaling
R49 True Differential Signaling
T48 True Differential Signaling
AN51 True Differential Signaling
AP52 True Differential Signaling
U51 True Differential Signaling
V52 True Differential Signaling
AF52 True Differential Signaling
AE51 True Differential Signaling
Y48 True Differential Signaling
W49 True Differential Signaling
AJ51 True Differential Signaling
AK52 True Differential Signaling
AA51 True Differential Signaling
AB52 True Differential Signaling
AR55 True Differential Signaling
AT54 True Differential Signaling
K52 True Differential Signaling
J51 True Differential Signaling
AL55 True Differential Signaling
AM54 True Differential Signaling
P52 True Differential Signaling
N51 True Differential Signaling
AC55 True Differential Signaling
AD54 True Differential Signaling
R55 True Differential Signaling
T54 True Differential Signaling
AG55 True Differential Signaling
AH54 True Differential Signaling
W55 True Differential Signaling
Y54 True Differential Signaling
AD48 LVPECL
®
Intel Agilex
QSFPDD Transmit Channel 0 Positive
QSFPDD Transmit Channel 0 negative
QSFPDD Transmit Channel 1 Positive
QSFPDD Transmit Channel 1 negative
QSFPDD Transmit Channel 2 Positive
QSFPDD Transmit Channel 2 negative
QSFPDD Transmit Channel 3 Positive
QSFPDD Transmit Channel 3 negative
QSFPDD Transmit Channel 4 Positive
QSFPDD Transmit Channel 4 negative
QSFPDD Transmit Channel 5 Positive
QSFPDD Transmit Channel 5 negative
QSFPDD Transmit Channel 6 Positive
QSFPDD Transmit Channel 6 negative
QSFPDD Transmit Channel 7 Positive
QSFPDD Transmit Channel 7 negative
QSFPDD Receive Channel 0 Positive
QSFPDD Receive Channel 0 negative
QSFPDD Receive Channel 1 Positive
QSFPDD Receive Channel 1 negative
QSFPDD Receive Channel 2 Positive
QSFPDD Receive Channel 2 negative
QSFPDD Receive Channel 3 Positive
QSFPDD Receive Channel 3 negative
QSFPDD Receive Channel 4 Positive
QSFPDD Receive Channel 4 negative
QSFPDD Receive Channel 5 Positive
QSFPDD Receive Channel 5 negative
QSFPDD Receive Channel 6 Positive
QSFPDD Receive Channel 6 negative
QSFPDD Receive Channel 7 Positive
QSFPDD Receive Channel 7 negative
QSFPDD Reference Clock Positive
™
F-Series FPGA (Two F-Tiles) Development Kit User Guide
Description
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