Intel Agilex F Series User Manual page 3

Fpga (two f-tiles) development kit
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Contents
A.2. FPGA Configuration.............................................................................................. 36
A.3. Default Switch and Jumper Settings....................................................................... 37
A.3.1. Switch Description................................................................................... 38
A.3.2. Jumper Description.................................................................................. 39
A.4. Input and Output Components...............................................................................40
A.4.1. Push Buttons...........................................................................................40
A.4.2. Switches.................................................................................................40
A.4.3. LEDs...................................................................................................... 41
A.5. Components and Interfaces...................................................................................41
A.5.1. PCI Express (PCIe) Interface..................................................................... 41
A.5.2. QSFP-DD Interface...................................................................................44
A.5.3. QSFP Interface........................................................................................ 46
A.5.4. CXL Interface.......................................................................................... 47
A.5.5. DDR4 DIMM1 Interface............................................................................. 48
A.5.6. DDR4 DIMM2 Interface............................................................................. 52
A.5.7. DDR4 Component Interface.......................................................................57
A.5.8. HPS I/O48 Interface.................................................................................60
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A.6. I
C.................................................................................................................... 61
A.7. Intel MAX 10 SPI Bus........................................................................................... 63
A.8. Clock Circuits...................................................................................................... 63
A.9. HPS Daughter Card.............................................................................................. 64
A.10. System Power................................................................................................... 66
A.11. Power Guidelines............................................................................................... 67
A.11.1. In a Standard PCIe-Compliant System...................................................... 67
A.12. Power Distribution System.................................................................................. 68
A.13. Power Measurement........................................................................................... 69
A.14. Thermal Limitations and Protection.......................................................................69
B. Additional Information................................................................................................. 70
B.1. Safety and Regulatory Information.........................................................................70
B.1.1. Safety Warnings...................................................................................... 71
B.1.2. Safety Cautions....................................................................................... 72
B.2. Compliance Information........................................................................................75
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Agilex
F-Series FPGA (Two F-Tiles) Development Kit User Guide
3

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