Cxl Interface - Intel Agilex F Series User Manual

Fpga (two f-tiles) development kit
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A. Development Kit Components
739942 | 2022.09.21
A.5.4. CXL Interface
The Intel Agilex FPGA (two F-tiles) development board provides a CXL connector
interface for cabling to an Intel-designed M.2 SSD daughter card supporting M-Keying.
This interface connects to four 28 Gbps F-tile lanes of the Intel Agilex FPGA. When
connecting the development board to this SSD daughter card, the development board
connects four transceiver channels from the F-tile bank 12C to M2 channels 8-11 (J5)
of the M.2 daughter card.
Table 32.
CXL Pin Assignments
Schematic Signal Name
CXL_TX_P0
CXL_TX_N0
CXL_TX_P1
CXL_TX_N1
CXL_TX_P2
CXL_TX_N2
CXL_TX_P3
CXL_TX_N3
CXL_RX_P0
CXL_RX_N0
CXL_RX_P1
CXL_RX_N1
CXL_RX_P2
CXL_RX_N2
CXL_RX_P3
CXL_RX_N3
REFCLK_CXL_EP_P
REFCLK_CXL_EP_N
REFCLK_CXL_CONN_P
REFCLK_CLK_CONN_N
Send Feedback
FPGA Pin Number
BW49
True Differential Signaling
BY48
True Differential Signaling
BV52
True Differential Signaling
BU51
True Differential Signaling
BR49
True Differential Signaling
BT48
True Differential Signaling
BP52
True Differential Signaling
BN51
True Differential Signaling
CC55
True Differential Signaling
CD54
True Differential Signaling
CB52
True Differential Signaling
CA51
True Differential Signaling
BW55
True Differential Signaling
BY54
True Differential Signaling
BR55
True Differential Signaling
BT54
True Differential Signaling
BC49
100 MHz LVPECL
BE49
100 MHz LVPECL
BG49
100 MHz LVPECL
BF48
100 MHz LVPECL
®
Intel
I/O Standard
CXL Transmit Channel 0 Positive
CXL Transmit Channel 0 Negative
CXL Transmit Channel 1 Positive
CXL Transmit Channel 1 Negative
CXL Transmit Channel 2 Positive
CXL Transmit Channel 2 Negative
CXL Transmit Channel 3 Positive
CXL Transmit Channel 3 Negative
CXL Receive Channel 0
Positive
CXL Receive Channel 0 Negative
CXL Receive Channel 1
Positive
CXL Receive Channel 1 Negative
CXL Receive Channel 2
Positive
CXL Receive Channel 2 Negative
CXL Receive Channel 3
Positive
CXL Receive Channel 3 Negative
CXL Reference Clock
Positive, Local board clock
CXL Reference Clock
Negative, Local board clock
CXL Reference Clock
Positive, Remote board clock
CXL Reference Clock
Agilex
F-Series FPGA (Two F-Tiles) Development Kit User Guide
Description
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47

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