To Report Command Error Occurrence
d
c
Figure 3-5. Sample Program : To Report Command Error Occurrence
For details on SRQ interrupt, see the \To Wait for Sweep End" example.
Enable Error Bit
Line 70 clears all bits of the Status Registers and Enable Registers.
In line 80, the command
enables bit 5 of the Status Byte Register). The command
Status Enable Register to 00100000 (this enables bit 5 of the Standard Event Status Register
(see Figure 3-6).
sets the Service Request Enable Register to 00100000 (this
sets the Standard Event
Synchronizing the Analyzer from Remote
a
b
3-5