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Under development
Preliminary specification
Specifications in this manual are tentative and subject to change.
M16C/26 Group
1. Usage Precaution
1.1 Precautions for Power Control
1. When exiting stop mode by hardware reset, set RESET pin to "L" until a main clock oscillation is
stabilized.
2. Insert more than four NOP instructions after an WAIT instruction or a instruction to set the CM10 bit of
CM1 register to "1". When shifting to wait mode or stop mode, an instruction queue reads ahead to the
next instruction to halt a program by an WAIT instruction and an instruction to set the CM10 bit to "1" (all
clocks stopped). The next instruction may be executed before entering wait mode or stop mode, de-
pending on a combination of instruction and an execution timing.
3. Wait until the t
d(M-L)
switching the clock source for CPU clock to the main clock.
Similarly, wait until the sub clock oscillates stably before switching the clock source for CPU clock to the
sub clock.
4. Suggestions to reduce power consumption
(a) Ports
The processor retains the state of each I/O port even when it goes to wait mode or to stop mode. A
current flows in active I/O ports. A pass current flows in input ports that high-impedance state. When
entering wait mode or stop mode, set non-used ports to input and stabilize the potential.
(b) A-D converter
When A-D conversion is not performed, set the VCUT bit of ADiCON1 register to "0" (no V
tion). When A-D conversion is performed, start the A-D conversion at least 1 µs or longer after setting
the VCUT bit to "1" (V
(c) Stopping peripheral functions
Use the CM0 register CM02 bit to stop the unnecessary peripheral functions during wait mode.
However, because the peripheral function clock (f
this measure is not conducive to reducing the power consumption of the chip. If low speed mode or
low power dissipation mode is to be changed to wait mode, set the CM02 bit to "0" (do not peripheral
function clock stopped when in wait mode), before changing wait mode.
(d) Switching the oscillation-driving capacity
Set the driving capacity to "LOW" when oscillation is stable.
(e) External clock
When using an external clock input for the CPU clock, set the CM0 register CM05 bit to "1" (stop).
Setting the CM05 bit to "1" disables the X
of current drawn in the chip. (When using an external clock input, note that the clock remains fed into
the chip regardless of how the CM05 bit is set.)
Rev.0.90
2003.12.28
page 1 of 28
elapses or main clock oscillation stabilization time, whichever is longer, before
connection).
REF
OUT
1.1 Precautions for Power Control
____________
) generated from the sub-clock does not stop,
C32
pin from functioning, which helps to reduce the amount
connec-
REF
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